Films of metals and metal oxides, particularly the heavier elements of Group VIII, are becoming important for a variety of electronic and electrochemical applications. This is at least because many of the Group VIII metal films are generally unreactive toward silicon and metal oxides, resistant to diffusion of oxygen and silicon, and are good conductors. Oxides of certain of these metals also possess these properties, although perhaps to a different extent.
Thus, films of Group VIII metals and metal oxides, particularly the second and third row metals (e.g., Ru, Os, Rh, Ir, Pd, and Pt) have suitable properties for a variety of uses in integrated circuits. For example, they can be used in integrated circuits for electrical contacts. They are particularly suitable for use as barrier layers between the dielectric material and the silicon substrate in memory devices, such as ferroelectric memories. Furthermore, they may even be suitable as the plate (i.e., electrode) itself in capacitors.
Platinum is one of the candidates for use as an electrode for high dielectric capacitors. Capacitors are the basic charge storage devices in random access memory devices, such as dynamic random access memory (DRAM) devices, static random access memory (SRAM) devices, and now ferroelectric memory (FE RAM) devices. They consist of two conductors, such as parallel metal or polysilicon plates, which act as the electrodes (i.e., the storage node electrode and the cell plate capacitor electrode), insulated from each other by a dielectric material (a ferroelectric dielectric material for FE RAMs). Thus, there is a continuing need for methods and materials for the deposition of Group VIII metal-containing films, preferably, platinum-containing films.
Many surfaces that result during the formation of Group VIII metal-containing films, particularly in the wafer fabrication of semiconductor devices, do not have uniform height, and therefore, the wafer thickness is also non-uniform. Further, surfaces may have defects such as crystal lattice damage, scratches, roughness, or embedded particles of dirt or dust. For various fabrication processes to be performed, such as lithography and etching, height non-uniformities and defects at the surface of the wafer must be reduced or eliminated. Various planarization techniques are available to provide such reduction and/or elimination. One such planarization technique includes mechanical and/or chemical-mechanical polishing (abbreviated herein as “CMP”).
A large fraction of yield losses in wafer fabrication or processing of semiconductor devices is attributed to contamination. Contaminants can be organic or inorganic particles, films or molecular compounds, ionic materials, or atomic species. Particularly problematic, however, is contamination from material removed from a surface during processing, such as, for example, etching or planarization. For example, during CMP, a rotating substrate of semiconductor material is held against a wetted planarization or polishing surface under controlled chemical liquid (i.e., slurry), pressure, and temperature conditions. The liquid typically consists of an abrasive component, such as alumina, silica, or similar particulates, although, alternatively, a polishing pad could include the abrasive component. Once the planarization or polishing is complete, particulate material that includes the material being removed from the surface being planarized typically remains on the surface of the substrate.
After processing (e.g., etching or CMP), the primary contaminants that need to be removed from the substrate surface include ionic, atomic, or molecular species containing the material being removed (e.g., platinum). Such contaminants may diffuse into the surface of the substrate and down fracture paths.
It has been reported that phosphonic acid chelating agents added to an SC-1 wet cleaning solution (a mixture of NH4OH, H2O2, and H2O, which typically has a pH of greater than 13) of an RCA clean commonly used to remove particles and organic contaminants on silicon surfaces subsequent to planarization processing, reduces certain metallic contamination deposition on a silicon substrate. This conclusion was reached in the article entitled “Thin-Oxide Dielectric Strength Improvement by Adding a Phosphonic Acid Chelating Agent into NH4OH—H2O2 Solution” by Akiya et al., J. Electrochem. Soc., Vol. 141, No. 10, October 1994. A mixture of HCl and H2O2 (SC-2 wet cleaning solution), which typically has a pH of no greater than 2, has been used in an RCA clean to remove metallic contaminants (e.g., alkali ions) subsequent to planarization or etching. Other cleaning solutions include a mixture of sulfuric acid and hydrogen peroxide, (i.e., sulfuric peroxide mixture or “SPM”), preferably at a ratio of 10:1, which typically has a pH of no greater than 1. None of these compositions have been reported to be useful in post-processing of platinum-containing surfaces.
Another problem that has not been adequately addressed is the cleaning of the planarization or polishing surface of equipment both during and after processing. When planarization or polishing surfaces are used with abrasive slurries, it is important to prevent the buildup of contaminants on such polishing surfaces. Such contaminants shorten the effective lifetime of processing equipment and should be removed to ensure precise processing of substrates during planarization or polishing without excessive contamination of the substrates.
Thus, compositions and methods are still needed to reduce, for example, the amount of Group VIII metal-containing contamination of the substrate being processed and the processing equipment used.